Electronic postage meter reset circuit
US4547853A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Oct 13, 1982 |
| Grant date | Oct 15, 1985 |
| Priority date | — |
| Expiry date | Oct 13, 2002 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG07B2017/00395
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A reset circuit for an electronic postage meter controls the operation of the reset line of the meter's computing system. The reset circuit operates in conjunction with a non-volatile memory protection circuit. The inter-relation of the reset circuit and non-volatile memory protection circuit protects against the possible loss of postage funds due to spurious data being written into the non-volatile memory. The reset circuit operation is controlled in part by the voltage levels applied to the non-volatile memory. This insures that the reset to the electronic postage meter computing system is released during power-up of the meter after proper voltage levels have applied to the user's non-volatile memory and reestablished during low power or power-down conditions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.