Memory access control circuit
US4549273A · kind A · utility
15Cited by
6References
6Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Dec 10, 1982 |
| Grant date | Oct 22, 1985 |
| Priority date | — |
| Expiry date | Dec 10, 2002 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/1663
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A circuit which controls access of host and remote processors to a single memory. A first flip-flop indicates acceptance or refusal of the processor's memory access requests. A second flip-flop provides a wait signal to the host processor when the remote processor is accessing the memory. A gating circuit causes the first flip-flop to accept the remote processor's access request when both the host and remote processors request memory access at the same time.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.