Integrated circuit contact technique
US4549914A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Apr 9, 1984 |
| Grant date | Oct 29, 1985 |
| Priority date | — |
| Expiry date | Apr 9, 2004 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/923
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A transfer layer is utilized to laterally redistribute impurities from a more heavily doped region to a lighter doped region. The contact to the source-drain region in advanced memory arrays has a width of the order of the minimum feature size. The source-drain has similar minimum feature dimensions in width to keep the array optimally dense. Thus this contact is made "headless" and requires a "line on line" alignment. Some offset in forming the window is inevitable and that offset exposes the channel stop. The contact then shorts to the substrate. Using a polysilicon transfer layer with an appropriate post anneal the region immediately under the contact and along the window sidewall can be autodoped sufficiently to avoid shorts to the substrate, and provide a continuous electrical path for the deposited contact.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.