Oscillation prevention during testing of integrated circuit logic chips
US4553049A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 7, 1983 |
| Grant date | Nov 12, 1985 |
| Priority date | — |
| Expiry date | Oct 7, 2003 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/31905
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Integrated circuit logic chips often oscillate during testing because the large unbypassed inductance of the test fixture causes off-chip driver switching noise to be fed back to the logic chip power supply. Oscillation may be prevented by adding an inhibit receiver and an off-chip driver inhibit network to the logic chip. The off-chip driver inhibit network provides a fan out path from the inhibit receiver to each off-chip driver. In response to an inhibit signal applied to the inhibit receiver, the inhibit network forces each of the off-chip drivers to the same logical state, the logic state being the natural logic state assumed by the off-chip drivers upon initial application of power to the chip. The driver inhibit receiver and inhibit network are employed to prevent oscillation at chip power-on, during driver and receiver parametric testing and during input test pattern tests.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.