Edge connector for chip carrier
US4557548A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Nov 13, 1984 |
| Grant date | Dec 10, 1985 |
| Priority date | — |
| Expiry date | Nov 13, 2004 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01R43/16
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
Socket for receiving edge of a chip carrier substrate comprises a dielectric housing having an elongate channel interrupted by partitions having aligned U-slots which limit position of substrate. Cavities separated by the partitions receive U-shaped contacts each having a base with directly opposed arms formed upward therefrom and a flat pin formed downward therefrom and extending into respective apertures in the floor of the channel. Arms present convex rolled inside surfaces to opposed surfaces of substrate for electrical contact therewith. Floor of channel has convex portion in each cavity on which base rocks as pin deflects resiliently in chamfered lead-in to aperture to accommodate any substrate warpage. Profile of U-slot in partition prevents stressing of arms beyond elastic limit. One embodiment of contact comprises a pair of opposed arms formed upward to a bend where each is formed through an obtuse angle toward the other arm of the pair, one arm being stamped from a continuous carrier strip leaving an aperture, each contact being attached to the carrier by a pair of straps.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.