MESFET logic gate having both DC and AC level shift coupling to the output
US4558235A · kind A · utility
24Cited by
7References
21Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 31, 1983 |
| Grant date | Dec 10, 1985 |
| Priority date | — |
| Expiry date | Aug 31, 2003 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/0952
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A MESFET logic gate wherein a logic switch node is both a-c coupled to the output node, preferably by a capacitor network and is also separately DC coupled to it, preferably by a voltage level shifter circuit. The direct capacitative coupling increases the high-frequency cut-off frequency, and reduces the current requirement of the voltage level shifter circuit. The voltage level shifter circuit, even using small width devices, provides low frequency and DC response, so that circuits using the gate of the present invention do not require initialization and refresh cycle. Thus, both high speed and low power are attained.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.