Frequency synthesizer with improved priority channel switching
US4559505A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 4, 1983 |
| Grant date | Dec 17, 1985 |
| Priority date | — |
| Expiry date | Jan 4, 2003 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/18
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A frequency synthesizer is provided including a reference frequency generator coupled to one input of a phase detector. The output of the phase detector is coupled via a pair of alternatingly connected filters through a voltage controlled oscillator and a divider circuit to the remaining input of the phase detector to form a phase locked loop. The first filter of the pair is designated for operation on a main channel frequency while the remaining filter is designated for operation on a priority channel frequency. The capacitive elements of each respective filter remain fully charged up for operation on their respective frequencies and thus when such filters are alternately switched between to change frequency from the main channel to the priority channel, the capacitive elements need not be charged to new levels to accommodate such frequency change. Thus, switching between a main channel and a priority channel is accomplished in a minimal amount of time with a significant reduction in frequency synthesizer energy requirements.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.