Logic waveform display apparatus
US4560981A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 23, 1983 |
| Grant date | Dec 24, 1985 |
| Priority date | — |
| Expiry date | Mar 23, 2003 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/322
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Disclosed herein is an apparatus for displaying a logic waveform on a raster scan display device such as a CRT. A part of an input logic signal is delayed for forming a former bit, and the input logic signal acts as a present bit. A memory device stores a special pattern determined in accordance with results of logic operation of the present and former bits. An image dot of the pattern is addressed by the present and former bits and raster line position (number) information, and the output therefrom is applied as an intensity control signal to the display device. Since the memory device does not need FONT information, this invention needs very little software manipulation of data, and the capacity of the memory device is small. In addition, this invention can display glitches and graticule tick marks.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.