Patent · US Expired

Programmable timing system

US4564953A · kind A · utility

26Cited by
10References
3Claims
0Family size

Assignee

Inventor

Key dates

Filing dateMar 28, 1983
Grant dateJan 14, 1986
Priority date
Expiry dateMar 28, 2003

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03K23/667
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

A programmable high resolution timing system includes a selectable modulus prescaler counter. In one embodiment a high frequency clock is coupled to a prescaler counter which provides an output signal every predetermined number of clock pulses. The prescaler is coupled to a period counter which provides a period signal after a predetermined number of prescaler output signal pulses. The prescaler and period counter are coupled to a memory which stores data corresponding to the selected modulus of the prescaler and the number of counts by which the period counter output signal is to be delayed. The period resolution is thus made substantially equal to the resolution of the high frequency clock by varying the prescaler modulus at programmable intervals.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.