Housing carrier for integrated circuit
US4568796A · kind A · utility
6Cited by
10References
5Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 29, 1983 |
| Grant date | Feb 4, 1986 |
| Priority date | — |
| Expiry date | Dec 29, 2003 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P70/50
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention concerns a housing carrier for an integrated circuit. It comprises at least two rows of output conductors disposed at regular intervals on the periphery of a housing along a given pitch, these conductors presenting end parts extending from the housing with a view to electrically connecting the housing on an utilization circuit, and wherein the rows are staggered with respect to one another.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.