Duplex central processing unit synchronization circuit
US4569017A · kind A · utility
49Cited by
9References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 22, 1983 |
| Grant date | Feb 4, 1986 |
| Priority date | — |
| Expiry date | Dec 22, 2003 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/2097
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
This circuit provides for synchronizing the internal clocks of at least two central processing unit process controllers. In order to synchronize the internal clocks of these central processing units (CPUs), the CPUs periodically execute a predetermined set of operating instructions which cause their internal clocks to coincide. This synchronization function is dynamic in that it is continually performed in an on-line fashion while the processors are performing their telecommunication process control function.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.