Method for manufacturing multilayer circuit substrate
US4569902A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jan 28, 1985 |
| Grant date | Feb 11, 1986 |
| Priority date | — |
| Expiry date | Jan 28, 2005 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for manufacturing a multilayer circuit substrate includes the step of providing an insulating substrate formed of an inorganic oxide and supporting a laminate formed by alternately laminating wiring layers of copper and insulating layers of an inorganic oxide. The uppermost layer of the laminate is constituted by a copper wiring layer. A layer of electrically conductive material capable of being subjected to wire bonding is formed by a low temperature deposition on the surface of the laminate. Subsequently, the conductive material layer is selectively removed by photoetching to allow the portion connected to part of the uppermost copper wiring layer to remain. In this manner, the pattern layer capable of wire bonding can be formed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.