Raster scan digital display system
US4570161A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 16, 1983 |
| Grant date | Feb 11, 1986 |
| Priority date | — |
| Expiry date | Aug 16, 2003 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G5/346
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
In a raster scan digital display system, a display image is stored, as coded characters or a bit map, which is larger than the display image. In order to define an image, within the stored image, for display, the addressing system for the memory (or memories) storing the image include a display image defining circuit. This circuit includes an address counter which is incremented to define successive addresses of data in a line of the displayed image, or row of characters therein. The circuit includes a first register to receive the initial address of a display image and a second register to receive a value indicating the width of the stored image. For the initial line (or character row) of a displayed image, the address counter is loaded from the first register and incremented from the initial address. For each subsequent line (or character row) the address from which the counter is incremented is the sum of the initial address of the previous line (or character row) and the value in the second register.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.