RMS converters
US4575649A · kind A · utility
4Cited by
2References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 19, 1984 |
| Grant date | Mar 11, 1986 |
| Priority date | — |
| Expiry date | Jul 19, 2004 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06G7/24
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An RMS converter has first and second transistors (40a and 42a) providing a signal representing double the log of the input voltage, a third transistor (40b), matched with the first (40a), providing a signal representative of the log of the output voltage and a fourth transistor (42b), matched with the second (42a). providing a signal representative of the anti-log of the ratio of those signals; the transistors in each matched pair are repetitively interchanged functionally thereby reducing errors caused by slight differences in the transistor operating characteristics.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.