One step write circuit arrangement for EEPROMS
US4578777A · kind A · utility
37Cited by
5References
28Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 11, 1983 |
| Grant date | Mar 25, 1986 |
| Priority date | — |
| Expiry date | Jul 11, 2003 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A novel write circuit arrangement for an EEPROM type memory system operable in response to the difference between the information stored in each addressed cell and the information to the be stored therein during a writing cycle and writing information into only those addressed cells for which a difference exists regardless of whether the difference indicates to charge or discharge the cell. The arrangement also can simultaneously charge one cell of a byte while discharging another cell of the same byte.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.