Dual port type semiconductor memory
US4578780A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Sep 27, 1983 |
| Grant date | Mar 25, 1986 |
| Priority date | — |
| Expiry date | Sep 27, 2003 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C8/16
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A dual port type semiconductor memory using a dynamic type random access memory (RAM) includes; a plurality of word lines, a plurality of pairs of bit lines, and a dynamic type RAM connected at each intersection of the word lines and the bit lines. The semiconductor memory further includes a first column decoder connected to a writing-reading out bus through a pair of gates (G.sub.1) including two transistors directly connected to each of the bit lines, and a second column decoder connected to a reading out bus through a pair of gates (G.sub.2) including four transistors. Gates of two of the four transistors of the second pair of gates are connected to each bit line. The other two of the four transistors are connected to the reading out bus.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.