Write protection circuit and method for a control register
US4580246A · kind A · utility
22Cited by
1References
11Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Nov 2, 1983 |
| Grant date | Apr 1, 1986 |
| Priority date | — |
| Expiry date | Nov 2, 2003 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/24
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A write protection circuit for a control register includes a first logic circuit which provides a write enable signal to the control register in response to simultaneously receiving a register select signal, a write control signal and an enable signal. A second logic circuit provides the enable signal to the first logic circuit only until the first logic circuit first provides the write enable signal. The second logic circuit will also cease to provide the enable signal in response to a time-out signal. In response to either a reset signal or a test signal, the second logic circuit will again provide the enable signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.