Integrated circuit mechanism for coupling multiple programmable logic arrays to a common bus
US4583193A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 22, 1982 |
| Grant date | Apr 15, 1986 |
| Priority date | — |
| Expiry date | Feb 22, 2002 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/267
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit mechanism is provided for coupling the separate sets of output lines from a plurality of programmable logic arrays to the same set of bus lines of plural-line signal transfer bus. This coupling mechanism includes precharge circuitry for precharging each of the bus lines during a first time interval. This coupling mechanism also includes a separate strobe signal line for each programmable logic array and circuitry for activating one of the strobe signal lines during a second time interval for selecting a particular programmable logic array. This coupling mechanism further includes a separate output buffer for each programmable logic array. Each such output buffer includes a plurality of buffer stages for individually coupling the different ones of the programmable logic array output lines to their respective bus lines. The buffer stages for each programmable logic array are responsive to the strobe signal for its programmable logic array for discharging during the second time interval those bus lines for which its programmable logic array output lines are at a particular binary value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.