Flat decoupling capacitor and method of manufacture thereof
US4584627A · kind A · utility
15Cited by
6References
23Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 9, 1985 |
| Grant date | Apr 22, 1986 |
| Priority date | — |
| Expiry date | Jan 9, 2005 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/435
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A flat decoupling capacitor having incorporated therein a multilayer chip capacitor which provides high capacitance values, local charge storage and noise decoupling for integrated circuits is presented. The decoupling capacitor essentially comprises at least two conductors electrically connected to a multilayer ceramic capacitor chip, all of which are encapsulated by an insulating material. Several embodiments are described having variations in chip dimensions, number of multilayer capacitors, number of conductors and particular structural configuration. A simplified embodiment and method of manufacture thereof is also presented.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.