Sorting apparatus
US4584664A · kind A · utility
3Cited by
1References
19Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Oct 17, 1983 |
| Grant date | Apr 22, 1986 |
| Priority date | — |
| Expiry date | Oct 17, 2003 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F7/22
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Apparatus for sorting two input numbers including a memory that iteratively receives a digit from both of the numbers and transmits output signals corresponding to the input digits, the digits of the larger number being transmitted on one output line and the digits of the smaller number being transmitted onto another output line. The apparatus includes a memory that receives, as address signals, the state signal and signals corresponding to the input digits. The state signal determines the output lines onto which the next pair of input digits are to be transmitted.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.