Compensation circuitry for a laser printer using a self-resonant scanner
US4586057A · kind A · utility
11Cited by
3References
4Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Mar 15, 1984 |
| Grant date | Apr 29, 1986 |
| Priority date | — |
| Expiry date | Mar 15, 2004 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06K15/1219
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Compensation circuitry for a laser printer using a self-resonant scanner wherein a clock generator (VCO) and an address counter operated between start of scan (SOS) and end of scan (EOS) signals are used in the generation of data clock signals. A flip-flop circuit is connected to receive the EOS signal and the output from a higher order bit output of the address counter to provide logic circuitry with an indication of whether the clock generator (VCO) frequency should be raised or lowered. The logic circuitry provides an input to a digital to analog means which is connected to the control input of the clock generator (VCO).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.