Central processing unit for a digital computer
US4586130A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 3, 1983 |
| Grant date | Apr 29, 1986 |
| Priority date | — |
| Expiry date | Oct 3, 2003 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/30192
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A central processing unit for a digital computer has a central memory unit connected to a system bus. A data path unit decodes variable length microinstructions that are stored in the central memory unit and that include an operation code and one or more operand specifiers, issuing a microaddress of one of a set of microinstructions stored in a control store. The microinstructions have a data path control field, a condition/size field and a next address control field. A microinstruction logic control is responsive to the microinstructions, and a memory control unit that includes a data cache memory array operates asynchronously with respect to the data path unit, translating virtual memory addresses to access data from the data cache memory array or from the central memory unit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.