Fabrication of integrated circuit with complementary, dielectrically-isolated, high voltage semiconductor devices
US4593458A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Nov 2, 1984 |
| Grant date | Jun 10, 1986 |
| Priority date | — |
| Expiry date | Nov 2, 2004 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76297
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Fabrication of an integrated circuit containing complementary, dielectrically-isolated, high voltage semiconductor devices of the lateral-current conduction type involves doping of the voltage-supporting regions of the complementary devices in two steps, in accordance with Lateral Charge Control technology. A first conductivity type dopant is introduced into a semiconductor layer as it is being epitaxially grown, with the dopant concentration being below about 20 percent of the desired final doping concentration of the first conductivity type voltage-supporting region. Ion implantation of further first conductivity type dopant achieves final doping of the first conductivity type voltage-supporting region, while a separate ion implantation of a second conductivity dopant achieves final doping of the second conductivity type voltage-supporting region. For high current silicon devices having voltage-supporting regions thicker than about 5 microns, a fast-diffusing P-conductivity dopant, such as aluminum, forms the P-conductivity type voltage-supporting region for enhancing device current conduction capacity, particularly in bipolar devices, such as IGTs or bipolar transistors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.