Synchronous receiver
US4594727A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jan 5, 1983 |
| Grant date | Jun 10, 1986 |
| Priority date | — |
| Expiry date | Jan 5, 2003 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L27/2276
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A synchronous receiver for receiving a phase shift modulated signal having binary data at a clock rate occurring within a baud interval. The synchronous receiver provides multiple estimates of the signal phase during selected portions of the baud interval, wherein the resulting phase values are averaged to provide a data output of low error rate and high reliability. The synchronous receiver of the present invention independently recovers the carrier and clock signals by separate digital phase-locked loops, wherein the resulting signals are used by the synchronous detector portion to recover the digital data. Moreover, the data acquisition time is improved by variable bandwidth characteristics of the phase locked loops.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.