Block-divided semiconductor memory device
US4596001A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Nov 30, 1983 |
| Grant date | Jun 17, 1986 |
| Priority date | — |
| Expiry date | Nov 30, 2003 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/4097
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a semiconductor memory device, memory cells (1-1 to 1-4, 1'-1, 1'-2) are divided into a plurality of blocks (BK.sub.1, BK.sub.2) in which a plurality of pairs of sense lines (S.sub.1, S.sub.1, . . . , S.sub.4, S.sub.4) are provided. The sense lines are commonly connected to each other, i.e., the sense lines of one block (BK.sub.1) are connected to the respective sense lines of the other block (BK.sub.2). The sense relationship between two adjacent sense lines (S.sub.1, S.sub.2) belonging to one block (BK.sub.1) is opposite to the sense relationship between the corresponding two adjacent sense lines (S.sub.1, S.sub.2) belonging to the other block (BK.sub.2).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.