Counter/divider apparatus
US4596027A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jun 24, 1985 |
| Grant date | Jun 17, 1986 |
| Priority date | — |
| Expiry date | Jun 24, 2005 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K23/66
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A counter/divider apparatus employing an array of counters arranged in parallel. Each counter repeatedly counts through a sequence of a number of clock pulses. The number is different for each counter and the numbers are relatively prime numbers. The outputs of the counters are applied to a detector that recognizes a preset combination of output signals which is present after a predetermined number of clock pulses have been received. The detector then produces an output pulse which clears all the counters to their initial states, and the cycle is repeated. The apparatus thus divides the input clock pulses by the aforementioned predetermined number.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.