Signal connection system for semiconductor chip
US4597029A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 19, 1984 |
| Grant date | Jun 24, 1986 |
| Priority date | — |
| Expiry date | Mar 19, 2004 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K7/1053
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor chip having a two-dimensional array of contacts on an exposed face thereof is mounted in a semiconductor chip module. A mechanism for delivering electricity spans the exposed face of the chip to which it is connected and includes interstitial gaps. A conductor board has a surface proximate the electricity delivering mechanism opposite from the chip. The surface of the board has a two-dimensional array of contacts which correspond to at least some of the contacts on the chip. A biasing mechanism extends from the electricity delivering mechanism toward the exposed face of the semiconductor chip and toward the conductor board, and corresponds to the array of contacts on the chip and board. Signal leads pass through the interstitial gaps and have end portions which extend transversely over the biasing means. The end portions of the signal leads are biased against the contacts of the chips and board by the biasing mechanism.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.