Device for loading and reading strings of latches in a data processing system
US4597042A · kind A · utility
51Cited by
10References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 19, 1983 |
| Grant date | Jun 24, 1986 |
| Priority date | — |
| Expiry date | Sep 19, 2003 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/318558
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A device for loading data in and reading data out of latch strings located in field replaceable units containing the circuitry of a data processing system realized in accordance with the Level-Scan Sensitive Design (LSSD) technique. Each field replaceable unit includes an addressing circuit. The addressing circuits are interconnected by a monitoring loop over which a configuration of address bits is serially transmitted by a control circuit. The data to be loaded and read out propagate in a data loop and are entered in a latch string under control of the addressing circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.