Multilayered ceramic circuit board
US4598167A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 25, 1984 |
| Grant date | Jul 1, 1986 |
| Priority date | — |
| Expiry date | Jul 25, 2004 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15312
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A multilayered ceramic circuit board, formed by sintering together a plurality of unit ceramic circuit boards, wherein each unit ceramic circuit board includes a ceramic layer, a patterned electrically conductive layer and through hole conductors formed in the ceramic layer for connecting the patterned electrically conductive layers of the respective unit ceramic circuit boards to form a predetermined wiring circuit. The patterned electrically conductive layers and the through hole conductors have a coefficient of thermal expansion which is greater than the coefficient of thermal expansion of the ceramic layers, wherein the difference between the coefficients of thermal expansion is selected to be less than 100.times.10.sup.-7 /.degree.C., and the through holes have decreased pitch. The conductive layers and conductors can be formed of a metal such as gold, silver or copper, with a low softening point glass filler to reduce the coefficient of thermal expansion of the conductive layers and conductors. The multilayered ceramic circuit board according to the present invention is less sensitive to cracks due to thermal stress.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.