Integrated circuit device having package with bypass capacitor
US4598307A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 7, 1983 |
| Grant date | Jul 1, 1986 |
| Priority date | — |
| Expiry date | Sep 7, 2003 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/30107
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In order to protect ICs from noise it is necessary to mount a bypass capacitor as close as possible to the IC die or chip. The package must seal the die from the environment, but there are marginal spaces at the ends of a dual in line type package (DIP type package) which are not needed for the sealing function. An opening is made in the lid of the package at such a marginal area, and a chip capacitor is mounted in the opening. An additional post is provided on the lead frame. A portion of this additional post and a portion of another lead provided by the frame are exposed through the opening in the lid. The chip capacitor is soldered to the exposed portions to mechanically and electrically connect the capacitor. The additional post is scored at the edge of the package to permit easy removal of the portion thereof that would otherwise extend outside the package.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.