Allocator for a reduction processor evaluating programs stored as binary directed graphs employing variable-free applicative language codes
US4598361A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 11, 1985 |
| Grant date | Jul 1, 1986 |
| Priority date | — |
| Expiry date | Jan 11, 2005 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/4494
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An allocator for a reduction processor which evaluates programs stored as binary graphs employing variable-free applicative language codes. These graphs are made up of nodes, each of which exists in memory and contains as its most significant bit a mark bit which when set indicates that the node is being used in a graph and when reset indicates that the node or storage location is available for future use by the processor. The allocator scans selected groups of storage locations in parallel to see if there are any unused storage locations and then places the addresses of those unused storage locations in a queue for use by the processor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.