Data format arrangement for communication between the peripheral processors of a telecommunications switching network
US4598404A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 22, 1983 |
| Grant date | Jul 1, 1986 |
| Priority date | — |
| Expiry date | Dec 22, 2003 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04Q11/06
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A formatted data message for conveying control information from the peripheral processor of one telecommunications switching system to the peripheral processor of at least one other telecommunications switching system is provided. The data message format comprises a first control work including a plurality of control bits, a data bit and a parity bit for the first control word and a plurality of data words, each data word including a parity bit. The data words contain control information to be conveyed to the receiving peripheral processor. A parity word is included which provides parity for an associated plurality of the preceding data and control words.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.