Method of making MOSFET by multiple implantations followed by a diffusion step
US4599118A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 24, 1984 |
| Grant date | Jul 8, 1986 |
| Priority date | — |
| Expiry date | Sep 24, 2004 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/082
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A short channel metal oxide semiconductor transistor device is processed without undesirable short channel effects, such as V.sub.T falloff and with a reasonable source-drain operating voltage support. In a substrate lightly doped with P-type conductivity material and source and drain region heavily doped with an N-type conductivity material, two lightly doped N- regions are disposed between the edge of the gate and the source and drain regions. A channel region is more heavily doped with P-type material than the substrate. Two regions extend from opposite sides of the channel region to an area generally below the two N- regions and above the substrate, which regions are more heavily doped than the channel regions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.