Self booting logical or circuit
US4599528A · kind A · utility
7Cited by
6References
9Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jan 17, 1983 |
| Grant date | Jul 8, 1986 |
| Priority date | — |
| Expiry date | Jan 17, 2003 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/096
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A solid state logical "OR" circuit for implementation with NMOS circuitry has self-booting clock pulse conditioning for ultra fast propagation times and minimal power dissipation, whereof memory row driver concepts are utilized and silicon area is minimized.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.