Timing recovery circuit for synchronous data transmission using combination of L Bi phase and modified biphase codes
US4599735A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 9, 1984 |
| Grant date | Jul 8, 1986 |
| Priority date | — |
| Expiry date | Mar 9, 2004 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/033
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A timing recovery circuit for synchronous data transmission using a signal which, in the baseband, is formed by a succession of two-level signal elements, without overlap, and of duration T, able to take one of the four forms defined by the functions: ##EQU1## comprises a transition selection circuit. This circuit selects transitions in the received signal, in the baseband, separated from those which immediately precede them by a time-delay situated in an arbitrary range. This range brackets a symbol duration of between 3/4 and 5/4 times, exclusive, the duration of a signal element. A timebase which is synchronized on the transitions selected by the selection circuit delivers the signal element recovered timing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.