High input impedance circuit
US4602172A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | May 10, 1983 |
| Grant date | Jul 22, 1986 |
| Priority date | — |
| Expiry date | May 10, 2003 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/1534
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A high input impedance circuit having a first differential circuit consisting of a pair of NPN transistors and a second differential circuit consisting of a pair of PNP transistors, is disclosed. One input terminal of the first differential circuit is connected to one input terminal of the second differential circuit. The other input terminal of the first differential circuit is connected to the other input terminal of the second differential circuit. A signal is supplied through a capacitor to one input terminal for eliminating a DC component of the signal. A DC biasing circuit for biasing the first and second differential circuits is connected to the other input terminal. First and second current source circuits are connected to the first and second differential circuits respectively.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.