Data processing apparatus for address substitution
US4603399A · kind A · utility
12Cited by
4References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 27, 1983 |
| Grant date | Jul 29, 1986 |
| Priority date | — |
| Expiry date | Dec 27, 2003 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0638
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Data from a patch memory (23) is substituted for that in a system ROM (9) by applying high order addresses to a standard PLA (19) having word lines (FIG. 3, 50a-50p). The address orders are separately applied to EXCLUSIVE OR circuits (27a-27g). The PLA (19) is personalized to activate line (21) at addresses to be substituted and to provide logical zeros to the EXCLUSIVE OR circuits (27a-27g) which change during the patch. Only one word line is required for each continuous patch, which vary in size on a patch-by-patch basis. The circuit is fast and efficient. It can be used for a wide variety of memory substitution applications.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.