Digital computer having unique instruction decoding logic
US4604684A · kind A · utility
9Cited by
1References
7Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Nov 15, 1983 |
| Grant date | Aug 5, 1986 |
| Priority date | — |
| Expiry date | Nov 15, 2003 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/261
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Method and apparatus for improving instruction decoding in a microcode-controlled digital computer system. The microinstruction sequences are made simple and compact enough that sufficient complexity is required in the instruction decoding logic that it is feasible to custom-configure a gate array to perform instruction decoding. The resultant gate array, by virtue of being embodied in a single integrated circuit, is extremely fast and compact and has low power requirements.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.