Output circuit for a semiconductor memory device
US4604731A · kind A · utility
25Cited by
8References
17Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 2, 1983 |
| Grant date | Aug 5, 1986 |
| Priority date | — |
| Expiry date | Sep 2, 2003 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/22
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An output circuit for a semiconductor memory device including a preset circuit connected to a data output terminal and adapted to set a potential on the data output terminal to a potential between a potential of a first potential supply terminal and a potential of a second supply terminal during a preparative period for read preceding a data readout from a memory cell whereby the potential level on the data output terminal reaches a "H" level or a "L" level. Thus, the output circuit with high speed readout operation and with high reliability by means of being free from the instability caused by an output noise can be obtained.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.