Reset signal generating circuit
US4607178A · kind A · utility
22Cited by
10References
2Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 3, 1983 |
| Grant date | Aug 19, 1986 |
| Priority date | — |
| Expiry date | Aug 3, 2003 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/223
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A semiconductor integrated circuit receiving at its input pin the terminal voltage of a capacitor which is connected to a power source through a resistor so as to detect the level of the power voltage. The circuit is provided with a level shift circuit which shifts the incoming power voltage level by a predetermined value so that a reset signal is produced by detecting the output of the level shift circuit falling below the threshold level of a logic circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.