Differential cascode current switch (DCCS) master slice for high efficiency/custom density physical design
US4607339A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jun 27, 1983 |
| Grant date | Aug 19, 1986 |
| Priority date | — |
| Expiry date | Jun 27, 2003 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/903
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A master slice designed for storage in sub-stock and for use in producing very large scale integrated circuits in an automated placement and wiring environment is described that is made from a semiconductor electronic quality wafer and the like, the wafer having a "brickwall" set of active elements such as bipolar transistors together with associated passive elements arranged in a master slice image. The master slice is personalized using optimization techniques including among other steps, the steps of modeling, developing and validating primitive logic diagrams, determining element placement by a Monte Carlo simulated annealing method, selecting hierarchical wiring by a maze runner algorithm and further validation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.