Fast envelope detector with bias compensation
US4608567A · kind A · utility
7Cited by
10References
5Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 22, 1984 |
| Grant date | Aug 26, 1986 |
| Priority date | — |
| Expiry date | Jun 22, 2004 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03D1/00
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In combination with an envelope detector in a radar system, a bias compensation circuit consisting of a programmable read-only memory and a binary adder produce an unbiased envelope detection signal. The bias compensation circuit adds one to the output of the detector based upon whether the minimum of the I and Q (inphase and quadrature) signals is odd and the maximum even. It is capable of compensating for both normal envelope detection and the multiple divide-by-two case. As a result the dynamic range of the radar can be increased without the necessity for extensive additional hardware.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.