Remote multiplexer terminal with redundant central processor units
US4610013A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 8, 1983 |
| Grant date | Sep 2, 1986 |
| Priority date | — |
| Expiry date | Nov 8, 2003 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/2017
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An approach is disclosed for accomplishing redundancy in the central processor units of a remote multiplexer terminal (RMT). Through execution of a stored software program the RMT receives data from input/output devices, processes that data and transmits it to external equipment. The system uses two central processor units (CPU's), each with its own input/output (I/O) bus. Both CPU's actively and continuously monitor the status of the I/O subsystems. The software program designates one CPU as the "Master", the other CPU as the "Slave". The CPU designated as "Master" performs active control functions so long as error detection circuitry within each CPU determines that the operational status of the "Master" is good. Error detection is accomplished by incorporation of a "Watch Dog Timer" in each CPU. A failing CPU is redesignated to be a Slave (and is halted) and the previously designated Slave CPU is redesignated as a Master. Since it has been "shadowing" the old Master CPU, the new Master CPU has a current record of the status of the I/O subsystems stored in its memory. Using this data, the new Master CPU assumes control over all of the I/O functions that were previously being contr…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.