Pipelined successive approximation analog-to-digital converter
US4611196A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Apr 8, 1985 |
| Grant date | Sep 9, 1986 |
| Priority date | — |
| Expiry date | Apr 8, 2005 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/442
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A successive approximation analog-to-digital converter (ADC) which uses pipeline processing techniques is disclosed. Each stage of the ADC uses a switched capacitor both as a sample and hold element and as a voltage subtracter. An analog potential is developed at terminal one of the capacitor and then the potential applied to the other terminal is changed by switching in or switching out a source of reference potential. The resulting analog value at the first end of the capacitor is the difference between the input value and reference potential. This value is applied to the next ADC stage. The polarity of this analog difference value determines the value of the digital bit signal produced by the stage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.