Zero power CMOS redundancy circuit
US4613959A · kind A · utility
19Cited by
1References
3Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jan 6, 1984 |
| Grant date | Sep 23, 1986 |
| Priority date | — |
| Expiry date | Jan 6, 2004 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/00392
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A redundancy circuit that consumes no power before or after activation switches a pair of output nodes from a first set of complementary logic levels to an inverted set when it is activated by blowing a pair of fuses.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.