Method of fabricating an insulated gate type field-effect transistor
US4616401A · kind A · utility
35Cited by
7References
4Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jan 10, 1985 |
| Grant date | Oct 14, 1986 |
| Priority date | — |
| Expiry date | Jan 10, 2005 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/017
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of fabricating a MOS device is disclosed, in which, after formation of a gate electrode and source, drain regions, conductive material films are formed by selective CVD on the exposed surfaces of the gate electrode and source, drain regions. The conditions of the selective CVD are set such that the conductive material films formed on the source and drain regions partly overlay over the field insulating film adjacent to and surrounding the source and drain regions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.