CMOS backup power switching circuit
US4617473A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jan 3, 1984 |
| Grant date | Oct 14, 1986 |
| Priority date | — |
| Expiry date | Jan 3, 2004 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02J9/061
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A load circuit is provided with a backup power supply to power the essential functions of the load in the event that its primary power supply fails or is otherwise degraded. The positive terminals of both the primary power supply and the backup power supply, having a common negative reference, are input to a differential voltage comparator circuit. The output of the differential voltage comparator circuit controls a switching transistor located in a line between the primary power supply and the load, and when inverted by an inverter circuit, controls a second switching transistor located in a line between the backup power supply and the load. In operation, only the more positive of the primary power or the backup power supply voltages is provided to the load. The output of the inverter circuit is also available to indicate which of the two sources the power is applied to the load, and may be further used to disable non-essential portions of the load circuitry.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.