Monolithically integrable MOS-comparator circuit

US4617549A · kind A · utility

Assignee

• Siemens Aktiengesellschaft · DE

Inventor

• Robert Reiner · Neubiberg, DE

Key dates

• Filing date: Jun 17, 1985
• Grant date: Oct 14, 1986
• Expiry date: Jun 17, 2005

Classification

• Technology area (CPC H): Electricity
• CPC primary: H03M1/362
• WIPO field: Basic communication processes
• WIPO sector: Electrical engineering

Abstract

An integrated semiconductor circuit for an analog-to-digital converter according to the parallel method, includes a multiplicity of identical comparators and a multiplicity of NOR gates. The comparators are addressable in a staggered manner at reference inputs thereof by a respective reference voltage and at signal inputs thereof jointly by a signal to be evaluated. Each of the comparators are respectively connected by a respective first signal output thereof to a first input of a respective one of the NOR gates forming a weighting stage with the respective comparator. The respective comparator is further connected by the respective first signal output thereof to a second input of another of the NOR gates associated with another of the comparators addressable by a next higher reference voltage. The respective comparator is also connected by respective second signal output thereof to a third input of a further one of the NOR gates associated with yet another of the comparators addressable by a next reference voltage. A read-only memory is provided and respective outputs of the NOR gates are connected via respective transfer transistors to respective inputs of the read-only memory. T…