Analog-to-digital converters with virtual integration
US4617550A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | May 24, 1984 |
| Grant date | Oct 14, 1986 |
| Priority date | — |
| Expiry date | May 24, 2004 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/0604
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A dual-slope analog-to-digital converter includes an integrator whose output may be driven from an initial zero voltage level to a value outside the linear region of the integrator in response to an input signal V.sub.X of unknown amplitude applied for a fixed integrating period T.sub.S. The output of the integrator is sensed and whenever the output voltage exceeds a preset limit a reference potential is applied to the integrator input, while the input signal is applied, to reduce its output below the preset limit. The time intervals the reference potential is applied during the period T.sub.S are measured and stored. Following the period T.sub.S the reference potential is applied until the integrator output is returned to the initial threshold level. The total time the reference potential is applied during the sampling period and after T.sub.S is accumulated enabling the determination of the value of V.sub.X.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.