Switching time correction circuit for electronic inverters
US4617622A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jun 27, 1985 |
| Grant date | Oct 14, 1986 |
| Priority date | — |
| Expiry date | Jun 27, 2005 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M7/53875
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A switching time correction circuit for electronic inverters controls the operation of power pole switches by delaying the application of each transition point in a reference pattern signal to the output switches. The length of the delay is reduced for transition points in the reference signal which correspond to negative power transitions in the power pole switch and the amount of delay time reduction is proportional to the output current of the respective power pole switch. By inserting a variable delay between the reference signal and the power switch, transition points in the output voltage are each delayed by a fixed time with respect to transition points in the reference waveform pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.